Marantz DV4100 User Manual Page 42

  • Download
  • Add to my manuals
  • Print
  • Page
    / 143
  • Table of contents
  • TROUBLESHOOTING
  • BOOKMARKS
  • Rated. / 5. Based on customer reviews
Page view 41
62
15. TEST INSTRUCTIONS DISPLAY BOARD
15.1 Display board
15.1.1 Introduction
These test instructions are written for all versions of the display
PCB 3104 123 42230.
The contents of the PCB can be split up into next blocks:
Figure 15-1
15.1.2 Functionality description:
The essential component of the display PCB is the P (slave).
This slave works on an 8MHz resonator and has a reset circuit
that is triggered by the +5Vstby. After the reset pulse, the
standby control line will release the reset of the host P. This
host P will then initialise the slave. In addition, when going to
stand-by, the slave will put the host P in reset. When the slave
receives the right IR or key code to leave the standby mode, the
reset of the host P will be released.
Other slave functions are:
Square signal generator to generate the filament voltage,
which is required for an AC FTD.
Generates the grid and segment scanning for the FTD.
Generates a scanning grid for the keys (separated from
display scanning).
Has inputs for RC (RC5 and RC6) and P50 (P50 controller
is built in).
15.1.3 General
Oscilloscope measurements have been carried out using a
Philips PM3392A.
Impedance of measuring-equipment should be > 1M .
To do correct measurements we recommend to use supply
3122 427 21370, which is used in all "second generation B"
DVD-players. Make sure that the main 3.3V has a 0.7A
load.
15.1.4 Reset
Check next reset timing with an oscilloscope at pin 10 of the
microprocessor.
Figure 15-2
Timing: 400msec < T1 > 700msec.
CH1: +5Vstby voltage at power on.
CH2: Voltage at pin 10.
15.1.5 Display steerign
Check next timing and level for all grid-lines (G1 r G14).
Figure 15-3
1. Check level A: +4V5 +/-10% for grid lines 1 => 11
2. Check level A: +4V0 +/-10% for grid lines 12 => 14
3. Check level B: -33V +/-10%
4. Check timing and levels of segment-lines P1 => P10:
Figure 15-4
Processor
I2C
Display
Key-matrix
RC-Eye
V filament
V filament
Buffer
P50
I/O
Supply:
+5Vstby
+12V
-40V
PM3392A
ch1
ch2
CH1 2. 00 V=
CH2 2 V= BW L MTB 100 ms- 1.04d v ch2+
1
2
T
T1
PM3392A
ch1
ch1: low =-34.2 V
ch1: high= 3.98 V
STOP
CH1 10.0 V= MTB 200us 2324us ch1+
1
T
A
B
PM3392A
ch1
CH1 10. 0 V= BWL MTB 500u s- 1.04 dv ch1 +
1
T
A
B
Page view 41
1 2 ... 37 38 39 40 41 42 43 44 45 46 47 ... 142 143

Comments to this Manuals

No comments